LMK04000 cleaner equivalent, family low-noise clock jitter cleaner.
1
*23 Cascaded PLLatinum™ PLL Architecture
– PLL1
– Phase Detector Rate of up to 40 MHz
– Integrated Low-Noise Crystal.
* Data Converter Clocking
* Wireless Infrastructure
* Networking, SONET/SDH, DSLAM
* Medical
* Milit.
Image gallery
Download